4394 search results - page 696 / 879 » Designing agent chips |
166
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SIGGRAPH
2000
ACM
15 years 10 months ago
2000
ACM
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
161
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PDP
2010
IEEE
15 years 10 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
180
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ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
168
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PARA
1998
Springer
15 years 10 months ago
1998
Springer
Abstract. Ahardware and software environment with performance above 1 Tera ops (teracomputing) is presently required to face the leading computational challenges not only in fundam...
157
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
As integrated circuits manufacturing technology is advancing into 65nm and 45nm nodes, extensive resolution enhancement techniques (RETs) are needed to correctly manufacture a chip...