4394 search results - page 693 / 879 » Designing agent chips |
174
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MICRO
2009
IEEE
16 years 1 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
160
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SLIP
2009
ACM
16 years 27 days ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...
159
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ICCAD
2008
IEEE
16 years 25 days ago
2008
IEEE
— The area-I/O flip-chip package provides a high chip-density solution to the demand of more I/O’s in VLSI designs; it can achieve smaller package size, shorter wirelength, an...
171
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RECONFIG
2008
IEEE
16 years 23 days ago
2008
IEEE
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
179
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ISCA
2007
IEEE
16 years 20 days ago
2007
IEEE
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...