Sciweavers

4394 search results - page 643 / 879
» Designing agent chips
Sort
View


views
56 years 6 months ago
IJCV
1998
81views more  IJCV 1998»
15 years 6 months ago
Estimating the Focus of Expansion in Analog VLSI
In the course of designing an integrated system for locating the focus of expansion (FOE) from a sequence of images taken while a camera is translating, a variety of direct motion ...
Ignacio S. McQuirk, Berthold K. P. Horn, Hae-Seung...
TVLSI
2002
95views more  TVLSI 2002»
15 years 6 months ago
Efficient inductance extraction using circuit-aware techniques
We propose two practical approaches for on-chip inductance extraction to obtain a highly sparsified and accurate inverse inductance matrix K. Both approaches differ from previous ...
Haitian Hu, Sachin S. Sapatnekar
TVLSI
2008
152views more  TVLSI 2008»
15 years 5 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
IEEEHPCS
2010
15 years 5 months ago
Analytical modeling and evaluation of network-on-chip architectures
Network-on-chip (NoC) architectures adopted for Systemon-Chip (SoC) are characterized by different trade-offs between latency, throughput, communication load, energy consumption, ...
Suboh A. Suboh, Mohamed Bakhouya, Jaafar Gaber, Ta...