4394 search results - page 620 / 879 » Designing agent chips |
179
click to vote
VLSID
2004
IEEE
16 years 6 months ago
2004
IEEE
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
180
click to vote
VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
151
click to vote
VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
183
click to vote
EUROSYS
2008
ACM
16 years 3 months ago
2008
ACM
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...
164
click to vote
ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...