4394 search results - page 616 / 879 » Designing agent chips |
180
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KSEM
2010
Springer
15 years 5 months ago
2010
Springer
This paper uses robot experience to explore key concepts of autonomy, life and being. Unfortunately, there are no widely accepted definitions of autonomy, life or being. Using a ne...
172
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
189
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MTDT
2003
IEEE
15 years 11 months ago
2003
IEEE
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
185
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
189
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CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...