4394 search results - page 594 / 879 » Designing agent chips |
156
click to vote
IPPS
2010
IEEE
15 years 3 months ago
2010
IEEE
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
175
click to vote
ETS
2011
IEEE
14 years 6 months ago
2011
IEEE
Abstract—Networks-on-Chip (NoCs) are implicitly fault tolerant due to their inherent redundancy. They can overcome defective cores, links and switches. As a side effect, yield is...
198
Voted
IACR
2011
14 years 6 months ago
2011
The KeeLoq cipher is used in many wireless car door systems and garage openers. Recently the algorithm was studied and several attacks have been published. When a random seed is no...
175
Voted
ISCA
2012
IEEE
13 years 9 months ago
2012
IEEE
Power consumption is a primary concern for microprocessor designers. Lowering the supply voltage of processors is one of the most effective techniques for improving their energy e...
129
click to vote
TEI
2009
ACM
16 years 1 months ago
2009
ACM
In this paper, we describe “The Other Brother”, a semiautonomous device that captures images and video of spontaneous moments in the course of everyday life. It was our goal t...