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ASPDAC
2008
ACM
145views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches
- We present a topology synthesis method for high performance System-on-Chip (SoC) design. Our method provides an optimal topology of on-chip communication network for the given ba...
Minje Jun, Sungjoo Yoo, Eui-Young Chung
ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
CF
2005
ACM
15 years 8 months ago
On the energy-efficiency of speculative hardware
Microprocessor trends are moving towards wider architectures and more aggressive speculation. With the increasing transistor budgets, energy consumption has become a critical desi...
Nana B. Sam, Martin Burtscher
ESTIMEDIA
2008
Springer
15 years 8 months ago
A framework for memory-aware multimedia application mapping on chip-multiprocessors
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasric...
EUROPAR
2008
Springer
15 years 8 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler