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WSCG
2004
154views more  WSCG 2004»
15 years 8 months ago
Emulating an Offline Renderer by 3D Graphics Hardware
3D design software has since long employed graphics chips for low-quality real-time previewing. But their dramatically increased computing power now paves the way to accelerate th...
Jörn Loviscach
ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
15 years 6 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
COMPSEC
2008
116views more  COMPSEC 2008»
15 years 6 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
JCP
2008
126views more  JCP 2008»
15 years 6 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu
MICRO
2012
IEEE
231views Hardware» more  MICRO 2012»
13 years 9 months ago
What is Happening to Power, Performance, and Software?
The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling—leadi...
Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blac...