4394 search results - page 535 / 879 » Designing agent chips |
130
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MICRO
2009
IEEE
16 years 1 months ago
2009
IEEE
As technology scaling drives the number of processor cores upward, current on-chip routers consume substantial portions of chip area and power budgets. Since existing research has...
174
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GECCO
2009
Springer
16 years 1 months ago
2009
Springer
The paper deals with optimization of collective communications on multistage interconnection networks (MINs). In the experimental work, unidirectional MINs like Omega, Butterfly a...
157
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SLIP
2009
ACM
16 years 1 months ago
2009
ACM
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
192
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ASAP
2008
IEEE
16 years 1 months ago
2008
IEEE
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
153
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ICASSP
2008
IEEE
16 years 1 months ago
2008
IEEE
Recently, the conventional lifting scheme that is widely used for the construction of Wavelets and 2-channel filter banks has been extended to M-channel filter banks (M > 2)....