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GLVLSI
2009
IEEE
131views VLSI» more  GLVLSI 2009»
16 years 1 months ago
Octilinear redistributive routing in bump arrays
This paper proposes a scheme for automatic re-distribution layer (RDL) routing, which is used in chip-package connections. Traditional RDL routing designs are mostly performed man...
Renshen Wang, Chung-Kuan Cheng
ISLPED
2009
ACM
110views Hardware» more  ISLPED 2009»
16 years 1 months ago
SOI, interconnect, package, and mainboard thermal characterization
This paper presents an evaluation to determine the importance of the accurate thermal characterization for several elements of a semiconductor device. Specifically, it evaluates ...
Joseph Nayfach-Battilana, Jose Renau
MICRO
2008
IEEE
88views Hardware» more  MICRO 2008»
16 years 1 months ago
Facelift: Hiding and slowing down aging in multicores
Processors progressively age during their service life due to normal workload activity. Such aging results in gradually slower circuits. Anticipating this fact, designers add timi...
Abhishek Tiwari, Josep Torrellas
DATE
2007
IEEE
88views Hardware» more  DATE 2007»
16 years 1 months ago
Improve CAM power efficiency using decoupled match line scheme
Content addressable memory (CAM) is widely used in many applications that require fast table lookup. Due to the parallel comparison feature and high frequency of lookup, however, ...
Yen-Jen Chang, Yuan-Hong Liao, Shanq-Jang Ruan
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
16 years 1 months ago
Analytical router modeling for networks-on-chip performance analysis
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
Ümit Y. Ogras, Radu Marculescu