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MICRO
1992
IEEE
128views Hardware» more  MICRO 1992»
15 years 10 months ago
MISC: a Multiple Instruction Stream Computer
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
ICCAD
1995
IEEE
95views Hardware» more  ICCAD 1995»
15 years 10 months ago
A sequential quadratic programming approach to concurrent gate and wire sizing
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
ASPDAC
2005
ACM
122views Hardware» more  ASPDAC 2005»
15 years 8 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...
CSREAESA
2006
15 years 8 months ago
Energy Optimization for Application-Specific NOC with Multi-Mode Switches
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. As technology scales to deep sub-...
Kuei-Chung Chang
NIPS
2001
15 years 8 months ago
Learning Spike-Based Correlations and Conditional Probabilities in Silicon
We have designed and fabricated a VLSI synapse that can learn a conditional probability or correlation between spike-based inputs and feedback signals. The synapse is low power, c...
Aaron P. Shon, David Hsu, Chris Diorio