This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind...
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. As technology scales to deep sub-...
We have designed and fabricated a VLSI synapse that can learn a conditional probability or correlation between spike-based inputs and feedback signals. The synapse is low power, c...