4394 search results - page 399 / 879 » Designing agent chips |
173
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ISCAS
2005
IEEE
16 years 8 days ago
2005
IEEE
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
164
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SAMOS
2005
Springer
16 years 5 days ago
2005
Springer
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Chi...
147
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ASYNC
2003
IEEE
15 years 12 months ago
2003
IEEE
The lack of proven mechanisms for transferring data between multiple synchronous islands has been a major impediment for applying globally asynchronous locally synchronous (GALS) ...
191
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper introduces the idea of using a User-Level Memory Thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main ...
219
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ASPDAC
1999
ACM
15 years 11 months ago
1999
ACM
This paper presents a performance-driven I/O pin routing algorithm with special consideration of wire uniformity. First, a topological routing based on min-cost max-flow algorith...