4394 search results - page 340 / 879 » Designing agent chips |
119
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ITC
2003
IEEE
15 years 12 months ago
2003
IEEE
Backside light emission and electrical measurements were used to evaluate the susceptibility to latchup of externally cabled I/O pins for a 0.13 µm technology generation [1,2] te...
170
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NANONET
2009
Springer
15 years 11 months ago
2009
Springer
In this paper we present a review of recent advances in the field of ultra-sensitive imagers with ultra fast detection capability. Photon counting capability in these sensors is ge...
126
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ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
We propose a circuit performance oriented device optimization methodology using pre-silicon parameters and critical paths which represent the performance of the chip. Based on our...
167
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MTDT
1999
IEEE
15 years 11 months ago
1999
IEEE
Continuing improvements in semiconductor fabrication density are enabling new classes of System-on-aChip architectures that combine extensive processing logic and high-density mem...
149
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...