Sciweavers

4394 search results - page 330 / 879
» Designing agent chips
Sort
View
ISCA
2005
IEEE
79views Hardware» more  ISCA 2005»
16 years 5 days ago
Design and Evaluation of Hybrid Fault-Detection Systems
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Up to now, system designers have prim...
George A. Reis, Jonathan Chang, Neil Vachharajani,...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 12 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
ISLPED
2010
ACM
170views Hardware» more  ISLPED 2010»
15 years 6 months ago
Low-power sub-threshold design of secure physical unclonable functions
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
Lang Lin, Daniel E. Holcomb, Dilip Kumar Krishnapp...
ISPASS
2009
IEEE
16 years 1 months ago
Differentiating the roles of IR measurement and simulation for power and temperature-aware design
In temperature-aware design, the presence or absence of a heatsink fundamentally changes the thermal behavior with important design implications. In recent years, chip-level infra...
Wei Huang, Kevin Skadron, Sudhanva Gurumurthi, Rob...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
16 years 6 days ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri