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DAC
2007
ACM
16 years 7 months ago
MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...
Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Fwu...
DAC
2007
ACM
16 years 7 months ago
Gate Sizing For Cell Library-Based Designs
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
Shiyan Hu, Mahesh Ketkar, Jiang Hu
DAC
2007
ACM
16 years 7 months ago
Automatic Verification of External Interrupt Behaviors for Microprocessor Design
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang
DAC
2000
ACM
16 years 7 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
HPCA
2009
IEEE
16 years 7 months ago
A low-radix and low-diameter 3D interconnection network design
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
Bo Zhao, Jun Yang 0002, Xiuyi Zhou, Yi Xu, Youtao ...