4394 search results - page 321 / 879 » Designing agent chips |
155
click to vote
IEEEPACT
2007
IEEE
16 years 27 days ago
2007
IEEE
Under current worst-case design practices, manufacturers specify conservative values for processor frequencies in order to guarantee correctness. To recover some of the lost perfo...
161
click to vote
ISCAS
2007
IEEE
16 years 26 days ago
2007
IEEE
—Systems on Chip (SoCs) congregate multiple modules and advanced interconnection schemes, such as networks on chip (NoCs). One relevant problem in SoC design is module mapping on...
147
click to vote
FMCAD
2007
Springer
16 years 22 days ago
2007
Springer
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
178
click to vote
GECCO
2007
Springer
16 years 22 days ago
2007
Springer
This work presents a novel approach to filter synthesis on a field programmable analog array (FPAA) architecture using a genetic algorithm (GA). First, a Matlab model of the FPA...
135
click to vote
ASPDAC
2004
ACM
16 years 13 hour ago
2004
ACM
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...