4394 search results - page 292 / 879 » Designing agent chips |
164
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of s...
160
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FPGA
2007
ACM
16 years 21 days ago
2007
ACM
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
196
Voted
ACMMSP
2006
ACM
16 years 15 days ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
171
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ISLPED
2005
ACM
16 years 3 days ago
2005
ACM
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
181
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SBCCI
2005
ACM
16 years 2 days ago
2005
ACM
Flow control mechanisms in Network-on-Chip (NoC) architectures are critical for fast packet propagation across the network and for low idling of network resources. Buffer manageme...