4394 search results - page 120 / 879 » Designing agent chips |
159
Voted
NOCS
2008
IEEE
16 years 16 days ago
2008
IEEE
Abstract— In this paper, we discuss a real-time on-chip communication service with a priority-based wormhole switching policy. A novel off-line schedulability analysis approach i...
165
Voted
NOCS
2008
IEEE
16 years 16 days ago
2008
IEEE
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
170
Voted
NOCS
2008
IEEE
16 years 16 days ago
2008
IEEE
In this paper, we introduce the use of slow-silent virtual channels to reduce the switching power of on-chip networks while keeping the leakage power small. Adding virtual channel...
163
Voted
VTS
2007
IEEE
16 years 13 days ago
2007
IEEE
In SoC designs, limited test access to internal cores, lowcost external tester’s lack of accuracy and slow frequencies make application of at-speed tests impractical. Therefore,...
175
Voted
ISCAS
2007
IEEE
16 years 11 days ago
2007
IEEE
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...