377 search results - page 28 / 76 » Designing a DHT for Low Latency and High Throughput |
164
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SOSP
2001
ACM
16 years 3 months ago
2001
ACM
Users rarely consider running network file systems over slow or wide-area networks, as the performance would be unacceptable and the bandwidth consumption too high. Nonetheless, ...
157
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SIGCOMM
2010
ACM
15 years 6 months ago
2010
ACM
Cloud data centers host diverse applications, mixing workloads that require small predictable latency with others requiring large sustained throughput. In this environment, today&...
194
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VLSID
2007
IEEE
16 years 6 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
159
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CAL
2008
15 years 4 months ago
2008
Packet-switched interconnect fabric, widely viewed as the de facto on-chip data communication standard in the many-core era, offers high throughput and excellent scalability. Howev...
163
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines(T-lin...