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CODES
2007
IEEE
15 years 11 months ago
Synchronization after design refinements with sensitive delay elements
The synchronous computational model with its simple computation and communication mechanism makes it easy to describe, simulate and formally verify synchronous embedded systems at...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
FPLAY
2008
15 years 9 months ago
Crafting game-models using reactive system design
This paper presents a game-model of a gym training system, where the behavior of the system is specified using languages developed originally for reactive system design, which dri...
David Harel, Itai Segall, Hillel Kugler, Yaki Sett...
DAC
2008
ACM
16 years 8 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
16 years 4 months ago
Robust analog/RF circuit design with projection-based posynomial modeling
In this paper we propose a RObust Analog Design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthe...
Xin Li, Padmini Gopalakrishnan, Yang Xu, Lawrence ...
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
16 years 1 months ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber