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HPCA
1997
IEEE
15 years 11 months ago
Design Issues and Tradeoffs for Write Buffers
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
Kevin Skadron, Douglas W. Clark
ASPDAC
2007
ACM
79views Hardware» more  ASPDAC 2007»
15 years 11 months ago
Challenges to Accuracy for the Design of Deep-Submicron RF-CMOS Circuits
- Two challenges for the accurate prediction of GHz CMOS analog/RF building blocks are presented. Challenging the usage of new compact MOSFET models enhances the simulation accurac...
S. Yoshitomi
EUROGP
2004
Springer
170views Optimization» more  EUROGP 2004»
15 years 11 months ago
Comparing Hybrid Systems to Design and Optimize Artificial Neural Networks
Abstract. In this paper we conduct a comparative study between hybrid methods to optimize multilayer perceptrons: a model that optimizes the architecture and initial weights of mul...
Pedro A. Castillo Valdivieso, Maribel Garcí...
ESANN
1998
15 years 9 months ago
Lazy learning for control design
This paper presents two local methods for the control of discrete-time unknown nonlinear dynamical systems, when only a limited amount of input-output data is available. The modeli...
Gianluca Bontempi, Mauro Birattari, Hugues Bersini
AUTOMATICA
2007
107views more  AUTOMATICA 2007»
15 years 7 months ago
Adaptive boundary control for unstable parabolic PDEs - Part II: Estimation-based designs
The certainty equivalence approach to adaptive control is commonly used with two types of identifiers: passivity-based identifiers and swapping identifiers. The “passive” (...
Andrey Smyshlyaev, Miroslav Krstic