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DAC
2005
ACM
16 years 8 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
16 years 4 months ago
Design-Space Exploration of Power-Aware On/Off Interconnection Networks
— With power a major limiting factor in the design of scalable interconnected systems, power-aware networks will become inherent components of single-chip and multi-chip systems....
Vassos Soteriou, Li-Shiuan Peh
DDECS
2009
IEEE
95views Hardware» more  DDECS 2009»
16 years 2 months ago
Self-timed full adder designs based on hybrid input encoding
—Self-timed full adder designs based on commercial synchronous resources (standard cells), constructed using a mix of complete delay-insensitive codes adopted for inputs are desc...
Padnamabhan Balasubramanian, D. A. Edwards, C. Bre...
DATE
2008
IEEE
68views Hardware» more  DATE 2008»
16 years 1 months ago
Automatic Generation of Complex Properties for Hardware Designs
Property checking is a promising approach to prove the correctness of today’s complex designs. However, in practice this requires the formulation of formal properties which is a...
Frank Rogin, Thomas Klotz, Görschwin Fey, Rol...
ARITH
2007
IEEE
16 years 1 months ago
Serial Parallel Multiplier Design in Quantum-dot Cellular Automata
An emerging nanotechnology, quantum-dot cellular automata (QCA), has the potential for attractive features such as faster speed, smaller size, and lower power consumption than tra...
Heumpil Cho, Earl E. Swartzlander Jr.