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CGO
2003
IEEE
15 years 11 months ago
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...
HHCI
2000
15 years 11 months ago
Haptic Graphs for Blind Computer Users
In this paper we discuss the design of computer-based haptic graphs for blind and visually impaired people with the support of our preliminary experimental results. Since visual i...
Wai Yu, Rameshsharma Ramloll, Stephen A. Brewster
ITS
2000
Springer
140views Multimedia» more  ITS 2000»
15 years 11 months ago
Multi-agent Negotiation to Support an Economy for Online Help and Tutoring
We are designing a computational architecture for a "learning economy" based on personal software agents who represent users in a virtual society and assist them in find...
Chhaya Mudgal, Julita Vassileva
PACS
2000
Springer
99views Hardware» more  PACS 2000»
15 years 11 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
PACS
2000
Springer
118views Hardware» more  PACS 2000»
15 years 11 months ago
Ramp Up/Down Functional Unit to Reduce Step Power
Because the inductive noise Ldi/dt is induced by the power change and can have disastrous impact on the timing and reliability of the system, high-performance CPU designs are more ...
Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O....