- This paper presents a carry lookahead (CLA) circuitry design based on dynamic circuit aiming at delay reduction in addition of BCD coded decimal numbers. The performance of the p...
— This paper describes a test-bed for planar micro manipulation tasks and a framework for planning based on quasistatic models of mechanical systems with frictional contacts. We ...
David J. Cappelleri, Jonathan Fink, Barry Munkunda...
In this paper, we perform a comparative study of different heuristics used to design combinational logic circuits. The use of local search hybridized with a genetic algorithm and ...
Carlos A. Coello Coello, Enrique Alba, Gabriel Luq...
The Virtual Interface Architecture brings the benefits of low latency User-level Networking to a cluster environment. With an increasing number of communication channels created ...
⎯ This paper presents our research results on power-clocked CMOS design. First we provide algebraic expressions and describe properties of clocked signals. Next two types of powe...