16822 search results - page 590 / 3365 » Designing Simulation Experiments |
172
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ISCAS
2003
IEEE
16 years 15 days ago
2003
IEEE
Since Limís 1986 paper on the frequency-response masking (FRM) technique for the design of FIR digital Ýlters with very small transition widths, the analysis and design of FRM ...
183
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DAC
1999
ACM
16 years 8 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
194
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SBCCI
2006
ACM
16 years 1 months ago
2006
ACM
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
200
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DAC
2003
ACM
16 years 14 days ago
2003
ACM
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
227
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GLVLSI
2010
IEEE
16 years 2 hour ago
2010
IEEE
Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...