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DAC
2007
ACM
15 years 11 months ago
Design for Verification in System-level Models and RTL
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
Anmol Mathur, Venkat Krishnaswamy
CODES
2001
IEEE
15 years 11 months ago
Modeling and evaluation of hardware/software designs
We introduce the foundation of a system modeling environment targeted at capturing the anticipated interactions of hardware and software behaviors -- not just their co-execution. ...
Neal K. Tibrewala, JoAnn M. Paul, Donald E. Thomas
PATMOS
2000
Springer
15 years 10 months ago
Early Power Estimation for System-on-Chip Designs
Abstract. Reduction of chip packaging and cooling costs for deep sub-micron SystemOn-Chip (SOC) designs is an emerging issue. We present a simulation-based methodology able to real...
Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reo...
CF
2010
ACM
15 years 7 months ago
Efficient cache design for solid-state drives
Solid-State Drives (SSDs) are data storage devices that use solid-state memory to store persistent data. Flash memory is the de facto nonvolatile technology used in most SSDs. It ...
Miaoqing Huang, Olivier Serres, Vikram K. Narayana...
ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 7 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards