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GLVLSI
2007
IEEE
107views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Side-channel resistant system-level design flow for public-key cryptography
In this paper, we propose a new design methodology to assess the risk for side-channel attacks, more specifically timing analysis and simple power analysis, at an early design st...
Kazuo Sakiyama, Elke De Mulder, Bart Preneel, Ingr...
SAC
2003
ACM
16 years 8 days ago
Representing the Applications and Compositions of Design Patterns in UML
Design patterns capture the distilled experience of expert designers. The compositions of design patterns may reuse design experience and solve a set of problems. Design patterns ...
Jing Dong
BMAS
2000
IEEE
15 years 11 months ago
High-Level Design Case of a Switched-Capacitor Low-Pass Filter Using Verilog-A
System design requires experienced designers that use heuristics and built up knowledge to propose a high order solution. Behavioral models can help to formalise, optimise and spe...
Erik Lauwers, Georges G. E. Gielen, Koen Lampaert,...
DATE
2008
IEEE
100views Hardware» more  DATE 2008»
16 years 1 months ago
A Mapping Framework for Guided Design Space Exploration of Heterogeneous MP-SoCs
When designing heterogeneous MP-SoCs designers have to take into account various objectives such as power, die size, flexibility, performance or programmability. But to be able t...
Bastian Ristau, Torsten Limberg, Gerhard Fettweis
ISQED
2003
IEEE
119views Hardware» more  ISQED 2003»
16 years 9 days ago
System and Framework for QA of Process Design Kits
In this paper, we evaluate the dependencies between tools, data and environment in process design kits, and present a framework for systematically analyzing the quality of the des...
M. C. Scott, M. O. Peralta, Jo Dale Carothers