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APCSAC
2001
IEEE
15 years 10 months ago
Retargetable Cache Simulation Using High Level Processor Models
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
Rajiv A. Ravindran, Rajat Moona
WSC
2007
15 years 9 months ago
Composability and component-based discrete event simulation
This work presents a framework and a Graphical User Interface, Viskit, for the creation and analysis of component-based Discrete Event Simulation models. Two primary elements of t...
Arnold H. Buss, Curtis L. Blais
CHES
2005
Springer
109views Cryptology» more  CHES 2005»
16 years 4 days ago
Security Evaluation Against Electromagnetic Analysis at Design Time
Electromagnetic analysis (EMA) can be used to compromise secret information by analysing the electric and/or magnetic fields emanating from a device. It follows differential power...
Huiyun Li, A. Theodore Markettos, Simon W. Moore
CODES
2004
IEEE
15 years 10 months ago
RTOS-centric hardware/software cosimulator for embedded system design
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
Shinya Honda, Takayuki Wakabayashi, Hiroyuki Tomiy...
DATE
2005
IEEE
102views Hardware» more  DATE 2005»
16 years 7 days ago
Modeling of a Reconfigurable OFDM IP Block Family For an RF System Simulator
The idea of design domain specific Mother Model of IP block family as a base of modeling of system integration is presented here. A common reconfigurable Mother Model for ten diff...
Hannu Heusala, Jussi Liedes