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CODES
2005
IEEE
16 years 2 days ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
SOSP
2005
ACM
16 years 3 months ago
Implementing declarative overlays
Overlay networks are used today in a variety of distributed systems ranging from file-sharing and storage systems to communication infrastructures. However, designing, building a...
Boon Thau Loo, Tyson Condie, Joseph M. Hellerstein...
CASES
2008
ACM
15 years 8 months ago
StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason ...
NETWORKING
2007
15 years 7 months ago
Detecting 802.11 Wireless Hosts from Remote Passive Observations
Abstract. The wide deployment of 802.11 WLANs has led to the coexistence of wired and wireless clients in a network environment. This paper presents a robust technique to detect 80...
Valeria Baiamonte, Konstantina Papagiannaki, Gianl...
GECCO
2008
Springer
179views Optimization» more  GECCO 2008»
15 years 7 months ago
Developing neural structure of two agents that play checkers using cartesian genetic programming
A developmental model of neural network is presented and evaluated in the game of Checkers. The network is developed using cartesian genetic programs (CGP) as genotypes. Two agent...
Gul Muhammad Khan, Julian Francis Miller, David M....