397 search results - page 6 / 80 » Designing Fast Asynchronous Circuits |
164
Voted
TVLSI
2010
15 years 15 days ago
2010
A method is described for synthesizing asynchronous circuits based on the Handshake Circuit paradigm but employing a data-driven, rather than a control-driven, style. This approach...
148
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SBCCI
2006
ACM
15 years 11 months ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
160
Voted
ISQED
2009
IEEE
16 years 18 days ago
2009
IEEE
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
135
Voted
ASPDAC
2001
ACM
15 years 9 months ago
2001
ACM
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
154
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
We present a visualization tool called PLFire, which allows a user to observe the behavior of a Phased Logic (PL) circuit. Phased logic is a technique for realizing self-timed cir...