100 search results - page 10 / 20 » Designing Digital Circuits for the Knapsack Problem |
157
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JETC
2008
15 years 4 months ago
2008
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
150
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GECCO
2006
Springer
15 years 9 months ago
2006
Springer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
179
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ISLPED
1996
ACM
15 years 10 months ago
1996
ACM
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
171
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ICCAD
2009
IEEE
15 years 3 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
178
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DAC
2003
ACM
15 years 11 months ago
2003
ACM
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...