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ITC
2003
IEEE
110views Hardware» more  ITC 2003»
16 years 16 hour ago
An extension to JTAG for at-speed debug on a system
When developing new designs, debugging the prototype is important to resolve application malfunction. During this board design debug, often a few pins of an IC are measured to che...
Leon van de Logt, Frank van der Heyden, Tom Waayer...
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
15 years 12 months ago
Taming the component timing: A CBD methodology for real-time embedded systems
—The growing trend towards using component based design approach in embedded system development requires addressing newer system engineering challenges. These systems are usually...
Manoj G. Dixit, Pallab Dasgupta, S. Ramesh
ISORC
1999
IEEE
15 years 11 months ago
Prediction of Fault-proneness at Early Phase in Object-Oriented Development
To analyze the complexity of object-oriented software, several metrics have been proposed. Among them, Chidamber and Kemerer's metrics are well-known ones as object-oriented ...
Toshihiro Kamiya, Shinji Kusumoto, Katsuro Inoue
ICCAD
1998
IEEE
76views Hardware» more  ICCAD 1998»
15 years 11 months ago
Functional debugging of systems-on-chip
Due to the exponential growth of both design complexity and the number of gates per pin, functional debugging has emerged as a critical step in the development of a system-on-chip...
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
ICCAD
1993
IEEE
139views Hardware» more  ICCAD 1993»
15 years 11 months ago
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors
— One major problem in pipeline synthesis is the detection and resolution of pipeline hazards. In this paper we present a new solution to the problem in the domain of pipelined a...
Ing-Jer Huang, Alvin M. Despain