– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
Abstract—The increasing presence of UDP traffic in the Internet and the emergence of sensing applications which do not require full reliability motivates the search for a robust...
The trends and recent changes in logistics lead to complex and partially conflicting requirements on logistic planning and control systems. Due to the lack of efficiency of curren...
Hagen Langer, Jan D. Gehrke, Joachim Hammer, Marti...
This research explored a new direction of improving collaborative design by performance measurement. More specifically, a novel 3-dimensional performance measurement model is deve...