Test is often seen as a necessary evil; it is a fact of life that ICs have manufacturing defects and those need to be filtered out by testing before the ICs are shipped to the cu...
Erik Jan Marinissen, Bart Vermeulen, Robert Madge,...
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
This paper describes a new collaboration technology that is based on the support of lightweight, informally structured, opportunistic activities featuring heterogeneous threads of...
David R. Millen, Michael J. Muller, Werner Geyer, ...