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ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
PPL
2008
185views more  PPL 2008»
15 years 6 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
14 years 10 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
VL
1997
IEEE
151views Visual Languages» more  VL 1997»
15 years 10 months ago
A Structured Interactive Workspace for a Visual Configuration Language
This paper shows how language technologies such as the automatic generation of parsers for analyzing user actions and visual parsing can be applied to build a flexible tool specia...
Jean-Yves Vion-Dury, François Pacull
CHI
2002
ACM
16 years 6 months ago
When conventions collide: the tensions of instant messaging attributed
We discuss findings from observation, interviews, and textual analysis of instant messaging use in a university research lab setting. We propose a method for characterizing the te...
Amy Voida, Wendy Newstetter, Elizabeth D. Mynatt