Sciweavers

5672 search results - page 770 / 1135
» Design techniques for low-power systems
Sort
View
DAC
2006
ACM
16 years 7 months ago
Games are up for DVFS
Graphics-intensive computer games are no longer restricted to highperformance desktops, but are also available on a variety of portable devices ranging from notebooks to PDAs and ...
Yan Gu, Samarjit Chakraborty, Wei Tsang Ooi
ISPASS
2009
IEEE
16 years 1 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
VISUALIZATION
1992
IEEE
15 years 11 months ago
Display of Scientific Data Structures for Algorithm Visualization
algorithms as networks of modules. The data flow architecture is popular because of the flexibility of mixing calculation modules with display modules, and because of its easy grap...
William L. Hibbard, Charles R. Dyer, Brian E. Paul
ISLPED
2007
ACM
169views Hardware» more  ISLPED 2007»
15 years 8 months ago
Throughput of multi-core processors under thermal constraints
We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
JAIR
2012
254views Hardware» more  JAIR 2012»
13 years 9 months ago
Completeness Guarantees for Incomplete Ontology Reasoners: Theory and Practice
To achieve scalability of query answering, the developers of Semantic Web applications are often forced to use incomplete OWL 2 reasoners, which fail to derive all answers for at ...
Bernardo Cuenca Grau, Boris Motik, Giorgos Stoilos...