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ISSS
1998
IEEE
87views Hardware» more  ISSS 1998»
15 years 10 months ago
Instruction Encoding Techniques for Area Minimization of Instruction ROM
In this paper, we propose instruction encoding techniques for embedded system design, which encode immediate fields of instructions to reduce the size of an instruction memory. Al...
Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue, ...
DATE
2000
IEEE
88views Hardware» more  DATE 2000»
15 years 11 months ago
Techniques for Reducing Read Latency of Core Bus Wrappers
Today’s system-on-a-chip designs consist of many cores. To enable cores to be easily integrated into different systems, many propose creating cores with their internal logic sep...
Roman L. Lysecky, Frank Vahid, Tony Givargis
CHI
2009
ACM
16 years 7 months ago
SiteLens: situated visualization techniques for urban site visits
Urban designers and urban planners often conduct site visits prior to a design activity to search for patterns or better understand existing conditions. We introduce SiteLens, an ...
Sean White, Steven Feiner
IISWC
2006
IEEE
16 years 14 days ago
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks
Many embedded real world applications are intellectual property, and vendors hesitate to share these proprietary applications with computer architects and designers. This poses a ...
Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., L...
ICCAD
2007
IEEE
107views Hardware» more  ICCAD 2007»
16 years 3 months ago
Computation of minimal counterexamples by using black box techniques and symbolic methods
— Computing counterexamples is a crucial task for error diagnosis and debugging of sequential systems. If an implementation does not fulfill its specification, counterexamples ...
Tobias Nopper, Christoph Scholl, Bernd Becker