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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
16 years 26 days ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
VTS
2007
IEEE
129views Hardware» more  VTS 2007»
16 years 24 days ago
Supply Voltage Noise Aware ATPG for Transition Delay Faults
The sensitivity of very deep submicron designs to supply voltage noise is increasing due to higher path delay variations and reduced noise margins with supply noise scaling. The s...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ICALP
2005
Springer
16 years 1 days ago
Optimal Spaced Seeds for Faster Approximate String Matching
Filtering is a standard technique for fast approximate string matching in practice. In filtering, a quick first step is used to rule out almost all positions of a text as possib...
Martin Farach-Colton, Gad M. Landau, Süleyman...
FASE
2004
Springer
15 years 12 months ago
Modeling Role-Based Access Control Using Parameterized UML Models
Abstract. Organizations use Role-Based Access Control (RBAC) to protect computer-based resources from unauthorized access. There has been considerable work on formally specifying R...
Dae-Kyoo Kim, Indrakshi Ray, Robert B. France, Na ...
KAIS
2006
111views more  KAIS 2006»
15 years 6 months ago
Efficient string matching with wildcards and length constraints
This paper defines a challenging problem of pattern matching between a pattern P and a text T, with wildcards and length constraints, and designs an efficient algorithm to return e...
Gong Chen, Xindong Wu, Xingquan Zhu, Abdullah N. A...