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ICCAD
1996
IEEE
85views Hardware» more  ICCAD 1996»
15 years 10 months ago
Exploiting regularity for low-power design
Abstract -- Current day behavioral-synthesis techniques produce architectures that are power-inefficient in the interconnect. Experiments have demonstrated that in synthesized desi...
Renu Mehra, Jan M. Rabaey
DAGM
2007
Springer
15 years 10 months ago
Greedy-Based Design of Sparse Two-Stage SVMs for Fast Classification
Cascades of classifiers constitute an important architecture for fast object detection. While boosting of simple (weak) classifiers provides an established framework, the design of...
Rezaul Karim, Martin Bergtholdt, Jörg H. Kapp...
FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 8 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
RIAO
2007
15 years 7 months ago
Exploring Interactive Information Retrieval: An Integrated Approach to Interface Design and Interaction Analysis
In this paper, we describe a novel methodology that integrates the design of the (i) user interface; (ii) interaction logger; and (iii) log analyzer. It is based on formalizing, v...
Gheorghe Muresan
HM
2010
Springer
133views Optimization» more  HM 2010»
15 years 7 months ago
A Hybrid LS-CP Solver for the Shifts and Breaks Design Problem
The problem of designing workforce shifts and break patterns is a relevant employee scheduling problem that arises in many contexts, especially in service industries. The issue is ...
Luca Di Gaspero, Johannes Gärtner, Nysret Mus...