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CASES
2004
ACM
15 years 10 months ago
Automatic data partitioning for the agere payload plus network processor
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
Steve Carr, Philip H. Sweany
DATE
2004
IEEE
119views Hardware» more  DATE 2004»
15 years 10 months ago
MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor
Designing custom-extensible instructions for Extensible Processors1 is a computationally complex task because of the large design space. The task of automatically matching candida...
Newton Cheung, Sri Parameswaran, Jörg Henkel,...
ISCA
2000
IEEE
93views Hardware» more  ISCA 2000»
15 years 10 months ago
Reconfigurable caches and their application to media processing
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
UAI
2007
15 years 7 months ago
"I Can Name that Bayesian Network in Two Matrixes!"
The traditional approach to building Bayesian networks is to build the graphical structure using a graphical editor and then add probabilities using a separate spreadsheet for eac...
Russell Almond
BMCBI
2005
115views more  BMCBI 2005»
15 years 6 months ago
Graphical representation of ribosomal RNA probe accessibility data using ARB software package
Background: Taxon specific hybridization probes in combination with a variety of commonly used hybridization formats nowadays are standard tools in microbial identification. A fre...
Yadhu Kumar, Ralf Westram, Sebastian Behrens, Bern...