4542 search results - page 683 / 909 » Design patterns for data structures |
197
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ASPLOS
2006
ACM
16 years 15 days ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
155
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
This paper introduces Way Stealing, a simple architectural modification to a cache-based processor to increase data bandwidth to and from application-specific Instruction Set Exte...
176
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HPDC
2007
IEEE
16 years 26 days ago
2007
IEEE
In desktop grids the use of off-the-shelf shared components makes the use of dedicated resources economically nonviable and increases the complexity of design of efficient storag...
182
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MICRO
2007
IEEE
16 years 24 days ago
2007
IEEE
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
156
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BIRTHDAY
2007
Springer
16 years 21 days ago
2007
Springer
With the Distributed File System Replication component, DFS-R, as the central theme, we present selected protocol problems and validation methods encountered during design and deve...