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GECCO
2007
Springer
138views Optimization» more  GECCO 2007»
16 years 29 days ago
Reducing the number of transistors in digital circuits using gate-level evolutionary design
This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In ad...
Zbysek Gajda, Lukás Sekanina
ICCAD
2007
IEEE
96views Hardware» more  ICCAD 2007»
16 years 3 months ago
Monte-Carlo driven stochastic optimization framework for handling fabrication variability
Increasing effects of fabrication variability have inspired a growing interest in statistical techniques for design optimization. In this work, we propose a Monte-Carlo driven sto...
Vishal Khandelwal, Ankur Srivastava
DATE
2002
IEEE
137views Hardware» more  DATE 2002»
15 years 11 months ago
Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
Qin Zhao, Bart Mesman, Twan Basten
DAC
2006
ACM
16 years 7 months ago
Design automation for DNA self-assembled nanostructures
DNA self-assembly is an emerging technology with potential as a future replacement of conventional lithographic fabrication. A key challenge is the specification of appropriate DN...
Constantin Pistol, Alvin R. Lebeck, Chris Dwyer
EDBT
2006
ACM
124views Database» more  EDBT 2006»
16 years 7 months ago
Physical Design Refinement: The "Merge-Reduce" Approach
Abstract. Physical database design tools rely on a DBA-provided workload to pick an "optimal" set of indexes and materialized views. Such an approach fails to capture sce...
Nicolas Bruno, Surajit Chaudhuri