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IJRR
2002
107views more  IJRR 2002»
15 years 6 months ago
Design of a Parallel-Type Gripper Mechanism
A new parallel-type gripper mechanism is proposed in this work. This device has a parallelogramic platform that can be flexibly folded. Therefore, this mechanism not only can be u...
Byung-Ju Yi, Heung Yeol Na, Jae Hoon Lee, Yeh-Sun ...
IEEECIT
2009
IEEE
16 years 1 months ago
Unifying Runtime Adaptation and Design Evolution
Abstract—The increasing need for continuously available software systems has raised two key-issues: self-adaptation and design evolution. The former one requires software systems...
Brice Morin, Thomas Ledoux, Mahmoud Ben Hassine, F...
MICRO
2007
IEEE
71views Hardware» more  MICRO 2007»
15 years 6 months ago
Effective Optimistic-Checker Tandem Core Design through Architectural Pruning
Design complexity is rapidly becoming a limiting factor in the design of modern, high-performance microprocessors. This paper introduces an optimization technique to improve the e...
Francisco J. Mesa-Martinez, Jose Renau
ISQED
2007
IEEE
162views Hardware» more  ISQED 2007»
16 years 1 months ago
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...
ASPDAC
2008
ACM
90views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Vertical via design techniques for multi-layered P/G networks
- In multi-layered power/ground (P/G) networks, to connect the whole network together, vertical vias are usually placed at intersections between metal wires of adjoining layers. In...
Shuai Li, Jin Shi, Yici Cai, Xianlong Hong