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ISLPED
2010
ACM
229views Hardware» more  ISLPED 2010»
15 years 7 months ago
An energy efficient cache design using spin torque transfer (STT) RAM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatte...
CGF
2010
135views more  CGF 2010»
15 years 6 months ago
Designing Quad-dominant Meshes with Planar Faces
We study the combined problem of approximating a surface by a quad mesh (or quad-dominant mesh) which on the one hand has planar faces, and which on the other hand is aestheticall...
Mirko Zadravec, Alexander Schiftner, Johannes Wall...
TVLSI
2008
116views more  TVLSI 2008»
15 years 6 months ago
Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs
Abstract--In this paper, we introduce a novel substrate noise estimation technique during early floorplanning for mixed signal system-on-chip (SOC), based on block preference direc...
Minsik Cho, David Z. Pan
TIP
1998
109views more  TIP 1998»
15 years 6 months ago
Optimum design of chamfer distance transforms
—The distance transform has found many applications in image analysis. Chamfer distance transforms are a class of discrete algorithms that offer a good approximation to the desir...
Muhammad Akmal Butt, Petros Maragos
ESWA
2008
141views more  ESWA 2008»
15 years 6 months ago
Classifier design with feature selection and feature extraction using layered genetic programming
This paper proposes a novel method called FLGP to construct a classifier device of capability in feature selection and feature extraction. FLGP is developed with layered genetic p...
Jung-Yi Lin, Hao-Ren Ke, Been-Chian Chien, Wei-Pan...