This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
In this paper, the effect of network-induced delay introduced into the control loop is modelled as time-varying disturbance. Based on this model, a fault isolation filter (FIF) f...
Flat DHT architectures have been the main focus of the research on DHT design so far. However, there have been also a number of works proposing hierarchical DHT organizations and ...
This paper proposes a reliability-centric hardware/ software co-design framework. This framework operates with a component library that provides multiple alternates for a given ta...
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, ...
A method for designing fast multidimensional filters using genetic algorithms is described. The filter is decomposed into component filters where coefficients can be sparsely sc...