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DATE
2006
IEEE
128views Hardware» more  DATE 2006»
16 years 23 days ago
Efficient link capacity and QoS design for network-on-chip
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israe...
ETFA
2006
IEEE
16 years 23 days ago
Robust Fault Isolation Filter Design for Networked Control Systems
In this paper, the effect of network-induced delay introduced into the control loop is modelled as time-varying disturbance. Based on this model, a fault isolation filter (FIF) f...
Shanbin Li, Dominique Sauter, Christophe Aubrun
P2P
2006
IEEE
16 years 21 days ago
Cost-Based Analysis of Hierarchical DHT Design
Flat DHT architectures have been the main focus of the research on DHT design so far. However, there have been also a number of works proposing hierarchical DHT organizations and ...
Stefan Zöls, Zoran Despotovic, Wolfgang Kelle...
ISQED
2005
IEEE
128views Hardware» more  ISQED 2005»
16 years 8 days ago
Reliability-Centric Hardware/Software Co-Design
This paper proposes a reliability-centric hardware/ software co-design framework. This framework operates with a component library that provides multiple alternates for a given ta...
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, ...
EVOW
2005
Springer
16 years 7 days ago
Design of Fast Multidimensional Filters Using Genetic Algorithms
A method for designing fast multidimensional filters using genetic algorithms is described. The filter is decomposed into component filters where coefficients can be sparsely sc...
Max Langer, Björn Svensson, Anders Brun, Mats...