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DAC
1998
ACM
15 years 10 months ago
Buffer Insertion for Noise and Delay Optimization
Interconnect-driven optimization is an increasingly important step in high-performance design. Algorithms for buffer insertion have been successfully utilized to reduce delay in gl...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
CASES
2003
ACM
15 years 10 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
14 years 2 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
FPL
2004
Springer
144views Hardware» more  FPL 2004»
15 years 10 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna
IPCO
2001
79views Optimization» more  IPCO 2001»
15 years 8 months ago
Synthesis of 2-Commodity Flow Networks
We investigate network design under volatile conditions of link failures and traffic overload. Our model is a non-simultaneous 2-commodity problem. We characterize the feasible so...
Refael Hassin, Asaf Levin