Sciweavers

8093 search results - page 271 / 1619
» Design optimization
Sort
View
EUROPAR
2008
Springer
15 years 8 months ago
Optimized Pipelined Parallel Merge Sort on the Cell BE
Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...
Jörg Keller, Christoph W. Kessler
TCAD
2010
116views more  TCAD 2010»
15 years 1 months ago
MeshWorks: A Comprehensive Framework for Optimized Clock Mesh Network Synthesis
Clock mesh networks are well known for their variation tolerance. But their usage is limited to high-end designs due to the significantly high resource requirements compared to clo...
Anand Rajaram, David Z. Pan
HPCA
2009
IEEE
16 years 7 months ago
Blueshift: Designing processors for timing speculation from the ground up
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey ...
PPSN
2000
Springer
15 years 10 months ago
Real-Coded Adaptive Range Genetic Algorithm Applied to Transonic Wing Optimization
Real-coded Adaptive Range Genetic Algorithms (ARGAs) have been applied to a practical three-dimensional shape optimization for aerodynamic design of an aircraft wing. The real-code...
Akira Oyama, Shigeru Obayashi, Takashi Nakamura
181
Voted
CASES
2009
ACM
15 years 11 months ago
Complete nanowire crossbar framework optimized for the multi-spacer patterning technique
Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this...
M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf ...