Sciweavers

8093 search results - page 140 / 1619
» Design optimization
Sort
View
COR
2006
112views more  COR 2006»
15 years 6 months ago
A continuous approach to considering uncertainty in facility design
This paper presents a formulation of the facilities block layout problem which explicitly considers uncertainty in material handling costs on a continuous scale by use of expected...
Bryan A. Norman, Alice E. Smith
DAC
2011
ACM
14 years 6 months ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...
DAC
2006
ACM
16 years 7 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
SIGMOD
2010
ACM
208views Database» more  SIGMOD 2010»
15 years 4 months ago
An automated, yet interactive and portable DB designer
Tuning tools attempt to configure a database to achieve optimal performance for a given workload. Selecting an optimal set of physical structures is computationally hard since it ...
Ioannis Alagiannis, Debabrata Dash, Karl Schnaitte...
ERSA
2008
185views Hardware» more  ERSA 2008»
15 years 7 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George