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DATE
2003
IEEE
109views Hardware» more  DATE 2003»
15 years 12 months ago
A Novel Metric for Interconnect Architecture Performance
We propose a new metric for evaluation of interconnect architectures. This metric is computed by optimal assignment of wires from a given wire length distribution (WLD) to a given...
Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Mud...
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
15 years 12 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
ENC
2003
IEEE
15 years 12 months ago
Efficient Compression from Non-ergodic Sources with Genetic Algorithms
Several lossless data compression schemes have been proposed over the past years. Since Shannon developed information theory in his seminal paper, however, the problem of data com...
Angel Fernando Kuri Morales
GLVLSI
2003
IEEE
157views VLSI» more  GLVLSI 2003»
15 years 12 months ago
Optimum wire sizing of RLC interconnect with repeaters
Repeaters are often used to drive high impedance interconnects. These lines have become highly inductive and can affect signal behavior. The line inductance should therefore be co...
Magdy A. El-Moursy, Eby G. Friedman
139
Voted
HAPTICS
2003
IEEE
15 years 12 months ago
Motion Guidance Experiments with Scooter Cobot
Cobots assist humans by mechanically guiding motion along software-defined paths or surfaces. Cobot design has been extensively studied previously. This paper reports the first sy...
Eng Seng Boy, Etienne Burdet, Chee Leong Teo, Jame...
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