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DATE
2005
IEEE
164views Hardware» more  DATE 2005»
16 years 8 days ago
Automated Synthesis of Assertion Monitors using Visual Specifications
Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
Ambar A. Gadkari, S. Ramesh
EEE
2005
IEEE
16 years 7 days ago
Who Counts Your Votes?
Open and fair elections are paramount to modern democracy. Although some people claim that the penciland-paper systems used in countries such as Canada and UK are still the best m...
Halina Kaminski, Lila Kari, Mark Perry
FPT
2005
IEEE
198views Hardware» more  FPT 2005»
16 years 7 days ago
From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
Wolfgang Klingauf, Robert Günzel
ICMB
2005
IEEE
98views Business» more  ICMB 2005»
16 years 7 days ago
Security Issues in SIP Signaling in Wireless Networks and Services
SIP appears to be a powerful and useful signaling protocol supporting mobility for wireless IP networks but it has inherent weaknesses and dangers. This paper is a study on the se...
Elthea T. Lakay, Johnson I. Agbinya
LCN
2005
IEEE
16 years 6 days ago
On the Performance of Reliable Server Pooling Systems
Reliable Server Pooling (RSerPool) is a protocol framework for server redundancy and session failover, currently under standardization by the IETF RSerPool WG. While the basic ide...
Thomas Dreibholz, Erwin P. Rathgeb