Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
Open and fair elections are paramount to modern democracy. Although some people claim that the penciland-paper systems used in countries such as Canada and UK are still the best m...
We describe a communication-centric design methodology with SystemC that allows for efficient FPGA prototype generation of transaction level models (TLM). Using a framework compr...
SIP appears to be a powerful and useful signaling protocol supporting mobility for wireless IP networks but it has inherent weaknesses and dangers. This paper is a study on the se...
Reliable Server Pooling (RSerPool) is a protocol framework for server redundancy and session failover, currently under standardization by the IETF RSerPool WG. While the basic ide...